Currently, Micro Electro-Mechanical Systems (MEMS) devices are packaged using chip scale packaging techniques, such as that shown in FIG. 1. The MEMS device is first created on a substrate. The MEMS device and substrate are then placed within a housing with electrical leads that extend to and through the housing for electrically connecting the MEMS device with other systems external to the housing. This method incurs the extra cost of the housing materials as well as the time and cost of mounting the substrate and MEMS device within the housing in such a manner so as not to exhibit any thermal stress due to differences in coefficients of thermal expansion between the substrate and the housing. Also, the resulting device formed by current methods is a larger package that takes up a large amount real estate in the final integrated circuit product.
Therefore, there exists a need in the art for lower cost methods for manufacturing wafer-level vacuum packaged devices.